Verilog

Top Star Repos

/search/repositories?q=language:Verilog&sort=stars&order=desc&per_page=30

1. cliffordwolf / picorv32

   1085

   PicoRV32 - A Size-Optimized RISC-V CPU
   
2. SI-RISCV / e200_opensource

   1041

   The Ultra-Low Power RISC Core
   
3. mntmn / amiga2000-gfxcard

   910

   MNT VA2000, an Open Source Amiga 2/3/4000 Graphics Card (Zorro II/III), written in Verilog
   
4. T-head-Semi / wujian100_open

   899

   IC design and development should be faster，simpler and more reliable
   
5. nvdla / hw

   809

   RTL, Cmodel, and testbench for NVDLA
   
6. darklife / darkriscv

   724

   opensouce RISC-V implemented from scratch in one night!
   

1. VerticalResearchGroup / miaow

   553

   An open source GPU based off of the AMD Southern Islands ISA.
   
2. parallella / oh

   479

   Silicon proven Verilog library for IC and FPGA designers
   
3. ZipCPU / zipcpu

   477

   A small, light weight, RISC CPU soft core
   
4. analogdevicesinc / hdl

   441

   HDL libraries and projects
   
5. alexforencich / verilog-ethernet

   355

   Verilog Ethernet components for FPGA implementation
   
6. mrehkopf / sd2snes

   332

   SD card based multi-purpose cartridge for the SNES
   
7. jmahler / mips-cpu

   332

   MIPS CPU implemented in Verilog
   
8. madcowswe / ODriveHardware

   295

   High performance motor control
   
9. Obijuan / open-fpga-verilog-tutorial

   294

   Learn how to design digital systems and synthesize them into an FPGA using only opensource tools
   
10. openrisc / mor1kx

    282

    mor1kx - an OpenRISC 1000 processor IP core
    
11. danielholanda / LeFlow

    270

    Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks
    
12. FPGAwars / icezum

    253

    :star2: IceZUM Alhambra: an Arduino-like Open FPGA electronic board
    
13. SymbioticEDA / riscv-formal

    247

    RISC-V Formal Verification Framework
    
14. dtysky / FPGA-Imaging-Library

    243

    An open source library for image processing on FPGA.
    
15. NetFPGA / netfpga

    238

    NetFPGA 1G infrastructure and gateware
    
16. kramble / FPGA-Litecoin-Miner

    230

    A litecoin scrypt miner implemented with FPGA on-chip memory.
    
17. opencomputeproject / Project-Zipline

    218

    Defines a lossless compressed data format that is independent of CPU type, operating system, file system, and character set, and is suitable for compression using the XP10 algorithm.
    
18. seldridge / verilog

    206

    Repository for basic (and not so basic) Verilog blocks with high re-use potential
    
19. marmolejo / zet

    191

    Open source implementation of a x86 processor
    
20. KastnerRG / riffa

    190

    The RIFFA development repository
    
21. zephray / VerilogBoy

    186

    A Pi emulating a GameBoy sounds cheap. What about an FPGA?
    
22. ridecore / ridecore

    177

    RIDECORE (RIsc-v Dynamic Execution CORE) is an Out-of-Order RISC-V processor written in Verilog HDL.
    
23. hunterlew / convolution_network_on_FPGA

    165

    CNN acceleration on virtex-7 FPGA with verilog HDL
    
24. OPAE / opae-sdk

    164

    Open Programmable Acceleration Engine
    

New Repos

/search/repositories?q=language:Verilog+created:2019-12-05&sort=stars&order=desc&per_page=12

• hexthat / simple_npx

  0

  Basic Neopixel driver for tinyFPGA-BX
• NoahM48 / Asteroids-on-FPGA

  0
• peoner / G-spot

  0
• jason841226 / mod4591inverse

  0
• yay899 / ECE2029-Final-Project

  0

  Rock paper scissors written in verilog.
• terrencetjr24 / 337Stuff

  0
• passawayj / design-4-adders

  0
• meteorvanilla / Elevator-Desgin-and-Simulation

  0

  Design and Simulation of Elevator Model using Verilog HDL
• passawayj / Design-ALU-20192-

  0
• merledu / SIngle-Cycle-RISC-V-In-Verilog

  0

  This repository contains the verilog code files of Single Cycle RISC-V architecture
• merledu / 5-Stage-Pipeline-RISC-V-Architecture-in-Verilog

  0

  This repository contains the verilog cde files of 5 stage Pipeline RISC-V architecture
• abhaypatil2000 / Verilog-sobel-edge-detector

  0

  On fpga4students you would get a code which onl simulates and here I have a code which also implements and can be burned on a fpga board