Verilog

Updated : 2019-04-20 00:20:52 UTC

Respositories

Counts
Total

/search/repositories?q=language:Verilog

19719
New

/search/repositories?q=language:Verilog+created:2019-04-19

10
Increase rate

( New / Total ) * 100

0.05%
Activity
Update

/search/repositories?q=language:Verilog+pushed:2019-04-19

89
Update Rate

( Update / Total ) * 100

0.45%
Sleeping

/search/repositories?q=language:Verilog+pushed:<2018-04-19

12639
Stars
Star 1000+

/search/repositories?q=language:Verilog+stars:>=1000

0
Star 100+

/search/repositories?q=language:Verilog+stars:>=100

44
Sum stars of Top 30 repos

sum ( repos.stars )

9377
Forks
Fork 1000+ Repos

/search/repositories?q=language:Verilog+forks:>=1000

0
Fork 100+

/search/repositories?q=language:Verilog+forks:>=100

11
Sum forks of Top 30 repos

sum ( repos.forks )

3469

Top Star Repos

/search/repositories?q=language:Verilog&sort=stars&order=desc&per_page=30

  1. 887
    MNT VA2000, an Open Source Amiga 2/3/4000 Graphics Card (Zorro II/III), written in Verilog
  2. 833
    PicoRV32 - A Size-Optimized RISC-V CPU
  3. 718
    RTL, Cmodel, and testbench for NVDLA
  4. 677
    The Ultra-Low Power RISC Core
  5. 599
    opensouce RISC-V implemented from scratch in one night!
  6. 510
    An open source GPU based off of the AMD Southern Islands ISA.
  1. 432
    Silicon proven Verilog library for IC and FPGA designers
  2. 348
    HDL libraries and projects
  3. 313
    A small, light weight, RISC CPU soft core
  4. 284
    MIPS CPU implemented in Verilog
  5. 251
    mor1kx - an OpenRISC 1000 processor IP core
  6. 241
    :star2: IceZUM Alhambra: an Arduino-like Open FPGA electronic board
  7. 240
    Verilog Ethernet components
  8. 224
    Aprender a diseñar sistemas digitales sintetizables en FPGAs usando SOLO herramientas libres #verilog #icestorm #lattice #Linux
  9. 223
    A litecoin scrypt miner implemented with FPGA on-chip memory.
  10. 210
    High performance motor control
  11. 205
    VHDL implementation of the RISC-V System-on-Chip based on bare &quot;Rocket Chip&quot;.
  12. 204
    NetFPGA 1G infrastructure and gateware
  13. 192
    An open source library for image processing on FPGA.
  14. 188
    Enabling Flexible FPGA High-Level Synthesis of Tensorflow Deep Neural Networks
  15. 185
    RISC-V Formal Verification Framework
  16. 181
    Open source implementation of a x86 processor
  17. 166
    Repository for basic (and not so basic) Verilog blocks with high re-use potential
  18. 160
    Defines a lossless compressed data format that is independent of CPU type, operating system, file system, and character set, and is suitable for compression using the XP10 algorithm.
  19. 154
    RIDECORE (RIsc-v Dynamic Execution CORE) is an Out-of-Order RISC-V processor written in Verilog HDL.
  20. 154
    The lab schedules for EECS168 at UC Riverside
  21. 152
    The Easy 8-bit Processor
  22. 150
    Open Programmable Acceleration Engine
  23. 148
    FPGA-based Nintendo Entertainment System Emulator
  24. 148
    CHIP-8 console on FPGA

New Repos

/search/repositories?q=language:Verilog+created:2019-04-19&sort=stars&order=desc&per_page=12

Users

Total

/search/users?q=language:Verilog

5845
Followers 100+

/search/users?q=language:Verilog+followers:>=100

0
Repos per User

repos.Total / users.Total

3.37