Updated : 2019-12-11 00:29:20 UTC

Respositories

Counts
Total

/search/repositories?q=language:VHDL

19892
New

/search/repositories?q=language:VHDL+created:2019-12-10

16
Increase rate

( New / Total ) * 100

0.08%
Activity
Update

/search/repositories?q=language:VHDL+pushed:2019-12-10

95
Update Rate

( Update / Total ) * 100

0.48%
Sleeping

/search/repositories?q=language:VHDL+pushed:<2018-12-10

13529
Stars
Star 1000+

/search/repositories?q=language:VHDL+stars:>=1000

0
Star 100+

/search/repositories?q=language:VHDL+stars:>=100

25
Sum stars of Top 30 repos

sum ( repos.stars )

8850
Forks
Fork 1000+ Repos

/search/repositories?q=language:VHDL+forks:>=1000

0
Fork 100+

/search/repositories?q=language:VHDL+forks:>=100

8
Sum forks of Top 30 repos

sum ( repos.forks )

2859

Top Star Repos

/search/repositories?q=language:VHDL&sort=stars&order=desc&per_page=30

  1. 881
    A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the future of the Bitcoin project as a whole. A binary release is currently available for the Terasic DE2-115 Development Board, and there are compile-able projects for numerous boards.
  2. 871
    Official repository of the AWS EC2 FPGA Hardware and Software Development Kit
  3. 850
    VHDL 2008/93/87 simulator
  4. 730
    A work-in-progress for what is to be a software-free web server for static content.
  5. 468
    GPL v3 2D/3D graphics engine in verilog
  6. 372
    Parallella board design files
  1. 369
    Community created parallella projects
  2. 334
    VUnit is a unit testing framework for VHDL/SystemVerilog
  3. 301
    VHDL compiler and simulator
  4. 290
    Core sources and tools for the MIST board
  5. 282
    GameCube Digital AV converter
  6. 282
    IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany
  7. 276
    A 32-bit RISC-V / MIPS ISA retargetable CPU core &amp; SoC, 1.63 DMIPS/MHz
  8. 251
    Arduino MIPI DSI Shield
  9. 240
    RISC-V by VectorBlox
  10. 238
    A tiny Open POWER ISA softcore written in VHDL 2008
  11. 210
    Reverse engineered SystemVerilog RTL version of the Yamaha OPL3 (YMF262) FM Synthesizer
  12. 178
    Open Source 4k CSI-2 Rx core for Xilinx FPGAs
  13. 166
    A Forth CPU and System on a Chip, based on the J1, written in VHDL
  14. 159
    An implementation of DisplayPort protocol for FPGAs
  15. 138
    Space Invaders game implemented with VHDL
  16. 132
    A simple RISC-V processor for use in FPGA designs.
  17. 120
    UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of FPGA and ASIC – resulting also in significant quality improvement. ***NOTE*** Modelsim/Questa 2019.2 has a bug. Do not use this version.
  18. 115
    A hardware h264 video encoder written in VHDL. Designed to be synthesized into an FPGA. Initial testing is using Xilinx tools and FPGAs but it is not specific to Xilinx.
  19. 107
    Second version of homemade 30 MHz - 6 GHz VNA
  20. 99
    Original hand-coded firmware for the HDMI2USB - HDMI/DVI Capture - project
  21. 99
    Library of VHDL components that are useful in larger designs.
  22. 98
    The Zylin ZPU
  23. 97
    A framework to integrate FPGA accelerators with Apache Arrow
  24. 97
    FPGA-based HDMI ambient lighting

New Repos

/search/repositories?q=language:VHDL+created:2019-12-10&sort=stars&order=desc&per_page=12

Users

Total

/search/users?q=language:VHDL

4997
Followers 100+

/search/users?q=language:VHDL+followers:>=100

0
Repos per User

repos.Total / users.Total

3.98