VHDL
Respositories
|
Total
/search/repositories?q=language:VHDL |
17556 |
|---|---|
|
New
/search/repositories?q=language:VHDL+created:2019-06-18 |
19 |
|
Increase rate
( New / Total ) * 100 |
0.11% |
|
Update
/search/repositories?q=language:VHDL+pushed:2019-06-18 |
63 |
|---|---|
|
Update Rate
( Update / Total ) * 100 |
0.36% |
|
Sleeping
/search/repositories?q=language:VHDL+pushed:<2018-06-18 |
11844 |
| Star 1000+
/search/repositories?q=language:VHDL+stars:>=1000 |
0 |
|---|---|
| Star 100+
/search/repositories?q=language:VHDL+stars:>=100 |
23 |
| Sum stars of Top 30 repos
sum ( repos.stars ) |
8074 |
| Fork 1000+ Repos
/search/repositories?q=language:VHDL+forks:>=1000 |
0 |
|---|---|
| Fork 100+
/search/repositories?q=language:VHDL+forks:>=100 |
7 |
| Sum forks of Top 30 repos
sum ( repos.forks ) |
2643 |
Top Star Repos
/search/repositories?q=language:VHDL&sort=stars&order=desc&per_page=30
-
845A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the future of the Bitcoin project as a whole. A binary release is currently available for the Terasic DE2-115 Development Board, and there are compile-able projects for numerous boards.
792Official repository of the AWS EC2 FPGA Hardware and Software Development Kit
729A work-in-progress for what is to be a software-free web server for static content.
722VHDL 2008/93/87 simulator
452GPL v3 2D/3D graphics engine in verilog
370Parallella board design files
-
369Community created parallella projects
299VUnit is a unit testing framework for VHDL/SystemVerilog
288VHDL compiler and simulator
264GameCube Digital AV converter
261Core sources and tools for the MIST board
252IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany
237A 32-bit RISC-V / MIPS ISA retargetable CPU core & SoC, 1.63 DMIPS/MHz
225Arduino MIPI DSI Shield
217RISC-V by VectorBlox
194Reverse engineered SystemVerilog RTL version of the Yamaha OPL3 (YMF262) FM Synthesizer
156A Forth CPU and System on a Chip, based on the J1, written in VHDL
150An implementation of DisplayPort protocol for FPGAs
147Open Source 4k CSI-2 Rx core for Xilinx FPGAs
132Space Invaders game implemented with VHDL
121Public repository for PicoEVB (Xilinx Artix XC7A50T based)
114A simple RISC-V processor for use in FPGA designs.
101Open Source VHDL Verification Library and Methodology - for very efficient VHDL verification of FPGA and ASIC - resulting also in a significant quality improvement
97Original hand-coded firmware for the HDMI2USB - HDMI/DVI Capture - project
96A hardware h264 video encoder written in VHDL. Designed to be synthesized into an FPGA. Initial testing is using Xilinx tools and FPGAs but it is not specific to Xilinx.
96FPGA-based HDMI ambient lighting
95The Zylin ZPU
86A pipelined RISCV implementation in VHDL
New Repos
/search/repositories?q=language:VHDL+created:2019-06-18&sort=stars&order=desc&per_page=12
-
0Projeto final da disciplina de Circuitos Digitais: implementação do NEANDER.
Users
Total /search/users?q=language:VHDL
4478 Followers 100+ /search/users?q=language:VHDL+followers:>=100
0 Repos per User repos.Total / users.Total
3.92 Most Followed
/search/users?q=language:VHDL+&sort=followers&order=desc&per_page=24
progranism