Updated : 2018-10-23 00:19:45 UTC

Respositories

Counts
Total

/search/repositories?q=language:VHDL

14223
New

/search/repositories?q=language:VHDL+created:2018-10-22

11
Increase rate

( New / Total ) * 100

0.08%
Activity
Update

/search/repositories?q=language:VHDL+pushed:2018-10-22

55
Update Rate

( Update / Total ) * 100

0.39%
Sleeping

/search/repositories?q=language:VHDL+pushed:<2017-10-22

8963
Stars
Star 1000+

/search/repositories?q=language:VHDL+stars:>=1000

0
Star 100+

/search/repositories?q=language:VHDL+stars:>=100

17
Sum stars of Top 30 repos

sum ( repos.stars )

6673
Forks
Fork 1000+ Repos

/search/repositories?q=language:VHDL+forks:>=1000

0
Fork 100+

/search/repositories?q=language:VHDL+forks:>=100

7
Sum forks of Top 30 repos

sum ( repos.forks )

2575

Top Star Repos

/search/repositories?q=language:VHDL&sort=stars&order=desc&per_page=30

  1. 791
    A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the future of the Bitcoin project as a whole. A binary release is currently available for the Terasic DE2-115 Development Board, and there are compile-able projects for numerous boards.
  2. 705
    A work-in-progress for what is to be a software-free web server for static content.
  3. 641
    Official repository of the AWS EC2 FPGA Hardware and Software Development Kit
  4. 554
    VHDL 2008/93/87 simulator
  5. 395
    GPL v3 2D/3D graphics engine in verilog
  6. 359
    Parallella board design files
  1. 358
    Community created parallella projects
  2. 246
    VUnit is a unit testing framework for VHDL/SystemVerilog
  3. 227
    GameCube Digital AV converter
  4. 220
    Core sources and tools for the MIST board
  5. 209
    IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universit├Ąt Dresden, Germany
  6. 194
    Arduino MIPI DSI Shield
  7. 180
    RISC-V by VectorBlox
  8. 178
    A 32-bit RISC-V / MIPS ISA retargetable CPU core
  9. 163
    Reverse engineered SystemVerilog RTL version of the Yamaha OPL3 (YMF262) FM Synthesizer
  10. 124
    Space Invaders game implemented with VHDL
  11. 124
    An implementation of DisplayPort protocol for FPGAs
  12. 97
    Original hand-coded firmware for the HDMI2USB - HDMI/DVI Capture - project
  13. 97
    Open Source 4k CSI-2 Rx core for Xilinx FPGAs
  14. 85
    FPGA-based HDMI ambient lighting
  15. 82
    A pipelined RISCV implementation in VHDL
  16. 79
    The Zylin ZPU
  17. 78
    A simple RISC-V processor for use in FPGA designs.
  18. 75
    Open Source VHDL Verification Library and Methodology - for very efficient VHDL verification of FPGA and ASIC - resulting also in a significant quality improvement
  19. 73
    A hardware h264 video encoder written in VHDL. Designed to be synthesized into an FPGA. Initial testing is using Xilinx tools and FPGAs but it is not specific to Xilinx.
  20. 69
    Library of VHDL components that are useful in larger designs.
  21. 69
    ZPUino HDL implementation
  22. 68
    Yet Another Forth Core...
  23. 67
    A repository of IPs for hardware computer vision (FPGA)
  24. 66
    A Bitcoin miner for the Zynq chip utilizing the Zedboard.

New Repos

/search/repositories?q=language:VHDL+created:2018-10-22&sort=stars&order=desc&per_page=12

Users

Total

/search/users?q=language:VHDL

3732
Followers 100+

/search/users?q=language:VHDL+followers:>=100

0
Repos per User

repos.Total / users.Total

3.81