( New / Total ) * 100
( Update / Total ) * 100
|Sum stars of Top 30 repos
sum ( repos.stars )
|Fork 1000+ Repos
|Sum forks of Top 30 repos
sum ( repos.forks )
Top Star Repos
889Official repository of the AWS EC2 FPGA Hardware and Software Development Kit
885A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the future of the Bitcoin project as a whole. A binary release is currently available for the Terasic DE2-115 Development Board, and there are compile-able projects for numerous boards.
882VHDL 2008/93/87 simulator
734A work-in-progress for what is to be a software-free web server for static content.
470GPL v3 2D/3D graphics engine in verilog
372Parallella board design files
370Community created parallella projects
340VUnit is a unit testing framework for VHDL/SystemVerilog
300VHDL compiler and simulator
297Core sources and tools for the MIST board
291GameCube Digital AV converter
290IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany
279A 32-bit RISC-V / MIPS ISA retargetable CPU core & SoC, 1.63 DMIPS/MHz
269A tiny Open POWER ISA softcore written in VHDL 2008
257Arduino MIPI DSI Shield
245RISC-V by VectorBlox
218Reverse engineered SystemVerilog RTL version of the Yamaha OPL3 (YMF262) FM Synthesizer
186Open Source 4k CSI-2 Rx core for Xilinx FPGAs
170A Forth CPU and System on a Chip, based on the J1, written in VHDL
159An implementation of DisplayPort protocol for FPGAs
138A simple RISC-V processor for use in FPGA designs.
138Space Invaders game implemented with VHDL
125UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of FPGA and ASIC – resulting also in significant quality improvement. Community forum: https://forum.uvvm.org/ UVVM.org: https://uvvm.org/
120A hardware h264 video encoder written in VHDL. Designed to be synthesized into an FPGA. Initial testing is using Xilinx tools and FPGAs but it is not specific to Xilinx.
110Second version of homemade 30 MHz - 6 GHz VNA
102Library of VHDL components that are useful in larger designs.
101A framework to integrate FPGA accelerators with Apache Arrow
5126 Followers 100+
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