Updated : 2020-07-06 00:21:10 UTC

Respositories

Counts
Total

/search/repositories?q=language:VHDL

22913
New

/search/repositories?q=language:VHDL+created:2020-07-05

13
Increase rate

( New / Total ) * 100

0.06%
Activity
Update

/search/repositories?q=language:VHDL+pushed:2020-07-05

45
Update Rate

( Update / Total ) * 100

0.20%
Sleeping

/search/repositories?q=language:VHDL+pushed:<2019-07-05

16348
Stars
Star 1000+

/search/repositories?q=language:VHDL+stars:>=1000

1
Star 100+

/search/repositories?q=language:VHDL+stars:>=100

35
Sum stars of Top 30 repos

sum ( repos.stars )

9478
Forks
Fork 1000+ Repos

/search/repositories?q=language:VHDL+forks:>=1000

0
Fork 100+

/search/repositories?q=language:VHDL+forks:>=100

9
Sum forks of Top 30 repos

sum ( repos.forks )

3110

Top Star Repos

/search/repositories?q=language:VHDL&sort=stars&order=desc&per_page=30

  1. 1032
    VHDL 2008/93/87 simulator
  2. 960
    Official repository of the AWS EC2 FPGA Hardware and Software Development Kit
  3. 916
    A completely open source implementation of a Bitcoin Miner for Altera and Xilinx FPGAs. This project hopes to promote the free and open development of FPGA based mining solutions and secure the future of the Bitcoin project as a whole. A binary release is currently available for the Terasic DE2-115 Development Board, and there are compile-able projects for numerous boards.
  4. 741
    A work-in-progress for what is to be a software-free web server for static content.
  5. 485
    GPL v3 2D/3D graphics engine in verilog
  6. 380
    Parallella board design files
  1. 375
    Community created parallella projects
  2. 368
    VUnit is a unit testing framework for VHDL/SystemVerilog
  3. 320
    Core sources and tools for the MIST board
  4. 320
    GameCube Digital AV converter
  5. 315
    IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany
  6. 311
    VHDL compiler and simulator
  7. 302
    A 32-bit RISC-V / MIPS ISA retargetable CPU core &amp; SoC, 1.63 DMIPS/MHz
  8. 275
    Arduino MIPI DSI Shield
  9. 233
    Reverse engineered SystemVerilog RTL version of the Yamaha OPL3 (YMF262) FM Synthesizer
  10. 226
    Open Source 4k CSI-2 Rx core for Xilinx FPGAs
  11. 193
    A Forth CPU and System on a Chip, based on the J1, written in VHDL
  12. 173
    An implementation of DisplayPort protocol for FPGAs
  13. 153
    VHDL synthesis (based on ghdl)
  14. 149
    A simple RISC-V processor for use in FPGA designs.
  15. 149
    UVVM (Universal VHDL Verification Methodology) is a free and Open Source Methodology and Library for very efficient VHDL verification of FPGA and ASIC – resulting also in significant quality improvement. Community forum: https://forum.uvvm.org/ UVVM.org: https://uvvm.org/
  16. 139
    Space Invaders game implemented with VHDL
  17. 132
    A hardware h264 video encoder written in VHDL. Designed to be synthesized into an FPGA. Initial testing is using Xilinx tools and FPGAs but it is not specific to Xilinx.
  18. 128
    Second version of homemade 30 MHz - 6 GHz VNA
  19. 118
    Open Source VHDL Verification Methodology (OSVVM) Repository
  20. 117
    Fletcher: A framework to integrate FPGA accelerators with Apache Arrow
  21. 114
    Library of VHDL components that are useful in larger designs.
  22. 114
    Implementation of a Tensor Processing Unit for embedded systems and the IoT.
  23. 106
    The Zylin ZPU

New Repos

/search/repositories?q=language:VHDL+created:2020-07-05&sort=stars&order=desc&per_page=12

Users

Total

/search/users?q=language:VHDL

5860
Followers 100+

/search/users?q=language:VHDL+followers:>=100

1
Repos per User

repos.Total / users.Total

3.91