Updated : 2019-08-21 01:01:19 UTC

Respositories

Counts
Total

/search/repositories?q=language:Bluespec

152
New

/search/repositories?q=language:Bluespec+created:2019-08-20

0
Increase rate

( New / Total ) * 100

0.00%
Activity
Update

/search/repositories?q=language:Bluespec+pushed:2019-08-20

1
Update Rate

( Update / Total ) * 100

0.66%
Sleeping

/search/repositories?q=language:Bluespec+pushed:<2018-08-20

108
Stars
Star 1000+

/search/repositories?q=language:Bluespec+stars:>=1000

0
Star 100+

/search/repositories?q=language:Bluespec+stars:>=100

0
Sum stars of Top 30 repos

sum ( repos.stars )

460
Forks
Fork 1000+ Repos

/search/repositories?q=language:Bluespec+forks:>=1000

0
Fork 100+

/search/repositories?q=language:Bluespec+forks:>=100

0
Sum forks of Top 30 repos

sum ( repos.forks )

182

Top Star Repos

/search/repositories?q=language:Bluespec&sort=stars&order=desc&per_page=30

  1. 94
    Connectal is a framework for software-driven hardware development.
  2. 42
    Riscy Processors - Open-Sourced RISC-V Processors
  3. 40
    P4-14/16 Bluespec Compiler
  4. 34
    RiscyOO: RISC-V Out-of-Order Processor
  5. 31
    The BERI and CHERI processor and hardware platform
  6. 24
    Open Source SSD Controller. NVMe and Lightstor variants
  1. 18
    MAERI public release
  2. 17
    A generic test bench written in Bluespec
  3. 17
    PCIe library for the Xilinx 7 series FPGAs in the Bluespec language
  4. 16
    A formal spec of the RISC-V Instruction Set Architecture, written in Bluespec BSV (executable, synthesizable)
  5. 16
    Bluespec BSV HLHDL tutorial
  6. 13
    OGC Points of Interest Encoding Specification
  7. 12
    Public release
  8. 11
    MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)
  9. 9
    RISC-V BSV Specification
  10. 8
    Bluespec SystemVerilog library for use of the IBM Coherent Accelerator-Processor Interface (CAPI)
  11. 7
    Rapid system integration of high-level synthesis kernels using the LEAP FPGA framework
  12. 6
    P4FPGA is located at github.com/hanw/p4fpga
  13. 6
    Bluespec SystemVerilog Reed Solomon Decoder
  14. 5
    Lab code for three-day lecture, &quot;Designing CNN Accelerators using Bluespec System Verilog&quot;, given at SNU in December 2017
  15. 4
    A Network Architecture for Disaggregated Racks
  16. 4
    Bluespec System Verilog language extension for Visual Studio Code
  17. 4
    LEAP FPGA primary components
  18. 4
    Structural Spec parser based on Bluespec
  19. 4
    Bluespec H.264 Decoder
  20. 3
    Bluespec 802.11a Transmitter
  21. 3
    A Bluespec SystemVerilog library of miscellaneous components
  22. 3
    Bluespec ISA Description framework
  23. 3
    Bit-string pattern matching for BSV
  24. 2
    Manythread overlay for FPGA clusters

New Repos

/search/repositories?q=language:Bluespec+created:2019-08-20&sort=stars&order=desc&per_page=12

Users

Total

/search/users?q=language:Bluespec

49
Followers 100+

/search/users?q=language:Bluespec+followers:>=100

0
Repos per User

repos.Total / users.Total

3.10